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1. general description the 74hc75 is a high-speed si-gate cmos device and is pin compatible with low power schottky ttl (lsttl). the 74hc75 is speci?ed in compliance with jedec standard no. 7a. the 74hc75 has four bistable latches. the two latches are simultaneously controlled by one of two active high enable inputs (le12 and le34). when lenn is high, the data enters the latches and appears at the nq outputs. the nq outputs follow the data inputs (nd) as long as lenn is high (transparent). the data on the nd inputs one set-up time prior to the high-to-low transition of the lenn will be stored in the latches. the latched outputs remain stable as long as the lenn is low. 2. features n complementary q and q outputs n v cc and gnd on the center pins n low-power dissipation n complies with jedec standard no. 7a n esd protection: u hbm eia/jesd22-a114-b exceeds 2000 v u mm eia/jesd22-a115-a exceeds 200 v. n multiple package options n speci?ed from - 40 cto+80 c and from - 40 c to +125 c. 74hc75 quad bistable transparant latch rev. 03 12 november 2004 product data sheet
9397 750 13816 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 2 of 20 philips semiconductors 74hc75 quad bistable transparant latch 3. quick reference data [1] c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ ? (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; ? (c l v cc 2 f o ) = sum of outputs. 4. ordering information table 1: quick reference data symbol parameter conditions min typ max unit t phl , t plh propagation delay c l =15pf; v cc =5v nd to nq, n q - 11 - ns lenn to nq, n q - 11 - ns c i input capacitance - 3.5 - pf c pd power dissipation capacitance per latch v i = gnd to v cc [1] -42-pf table 2: ordering information type number package temperature range name description version 74hc75n - 40 c to +125 c dip16 plastic dual in-line package; 16 leads (300 mil) sot38-4 74hc75d - 40 c to +125 c so16 plastic small outline package; 16 leads; body width 3.9 mm sot109-1 74hc75db - 40 c to +125 c ssop16 plastic shrink small outline package; 16 leads; body width 5.3 mm sot338-1 74hc75pw - 40 c to +125 c tssop16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1
9397 750 13816 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 3 of 20 philips semiconductors 74hc75 quad bistable transparant latch 5. functional diagram fig 1. functional diagram fig 2. logic symbol 001aab853 l1 d cp 16 2 13 q 1 l2 d cp 15 3q 14 l3 d cp 10 6 4 1d le12 2d 3d le34 q 11 l4 d cp 9 7 4d q 8 1q 1q 2q 2q 3q 3q 4q 4q 001aab851 1d le12 l1,2 l3,4 le34 13 4 1q 1q 2q 2q 3q 3q 4q 4q 2d 3d 4d 8 9 11 10 14 15 1 16 2 7 6 3
9397 750 13816 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 4 of 20 philips semiconductors 74hc75 quad bistable transparant latch 6. pinning information 6.1 pinning fig 3. iec logic symbol fig 4. logic diagram 001aab852 4 c1 7 1d 9 8 6 10 11 13 c1 2 1d 16 1 3 15 14 001aab854 latch 1 d cp 1q 1d le12 q 1q latch 2 d cp 2q 2d q 2q latch 3 d cp 3q 3d le34 q 3q latch 4 d cp 4q 4d q 4q fig 5. pin con?guration 75 1q 1q 1d 2q 2d 2q le34 le12 v cc gnd 3d 3q 4d 3q 4q 4q 001aab850 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15
9397 750 13816 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 5 of 20 philips semiconductors 74hc75 quad bistable transparant latch 6.2 pin description 7. functional description 7.1 function table [1] h = high voltage level; l = low voltage level; q = lower case letters indicate the state of the referenced output one set-up time prior to the high-to-low lenn transition; x = dont care. table 3: pin description symbol pin description 1 q 1 complementary latch output 1 1d 2 data input 1 2d 3 data input 2 le34 4 latch enable input for latches 3 and 4 (active high) v cc 5 positive supply voltage 3d 6 data input 3 4d 7 data input 4 4 q 8 complementary latch output 4 4q 9 latch output 4 3q 10 latch output 3 3 q 11 complementary latch output 3 gnd 12 ground (0 v) le12 13 latch enable input for latches 1 and 2 (active high) 2 q 14 complementary latch output 2 2q 15 latch output 2 1q 16 latch output 1 table 4: function table [1] operating mode input output lenn nd nq n q data enabled h l l h hhhl data latched l x q q
9397 750 13816 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 6 of 20 philips semiconductors 74hc75 quad bistable transparant latch 8. limiting values [1] above 70 c: p tot derates linearly with 12 mw/k. [2] above 70 c: p tot derates linearly with 8 mw/k. 9. recommended operating conditions table 5: limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage - 0.5 +7 v i ik input diode current v i < - 0.5 v or v i >v cc + 0.5 v - 20 ma i ok output diode current v o < - 0.5 v or v o >v cc + 0.5 v - 20 ma i o output source or sink current v o = - 0.5 v to v cc + 0.5 v - 25 ma i cc , i gnd v cc or gnd current - 50 ma t stg storage temperature - 65 +150 c p tot power dissipation dip16 package [1] - 750 mw so16, ssop16 and tssop16 packages [2] - 500 mw table 6: recommended operating conditions symbol parameter conditions min typ max unit v cc supply voltage 2.0 5.0 6.0 v v i input voltage 0 - v cc v v o output voltage 0 - v cc v t r , t f input rise and fall times v cc = 2.0 v - - 1000 ns v cc = 4.5 v - 6.0 500 ns v cc = 6.0 v - - 400 ns t amb ambient temperature - 40 - +125 c
9397 750 13816 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 7 of 20 philips semiconductors 74hc75 quad bistable transparant latch 10. static characteristics table 7: static characteristics at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit t amb =25 c v ih high-level input voltage v cc = 2.0 v 1.5 1.2 - v v cc = 4.5 v 3.15 2.4 - v v cc = 6.0 v 4.2 3.2 - v v il low-level input voltage v cc = 2.0 v - 0.8 0.5 v v cc = 4.5 v - 2.1 1.35 v v cc = 6.0 v - 2.8 1.8 v v oh high-level output voltage v i =v ih or v il i o = - 20 m a; v cc = 2.0 v 1.9 2.0 - v i o = - 20 m a; v cc = 4.5 v 4.4 4.5 - v i o = - 20 m a; v cc = 6.0 v 5.9 6.0 - v i o = - 4 ma; v cc = 4.5 v 3.98 4.32 - v i o = - 5.2 ma; v cc = 6.0 v 5.48 5.81 - v v ol low-level output voltage v i =v ih or v il i o =20 m a; v cc = 2.0 v - 0 0.1 v i o =20 m a; v cc = 4.5 v - 0 0.1 v i o =20 m a; v cc = 6.0 v - 0 0.1 v i o = 4 ma; v cc = 4.5 v - 0.15 0.26 v i o = 5.2 ma; v cc = 6.0 v - 0.16 0.26 v i li input leakage current v i =v cc or gnd; v cc = 6.0 v - - 0.1 m a i cc quiescent supply current v i =v cc or gnd; i o =0a; v cc = 6.0 v - - 8.0 m a c i input capacitance - 3.5 - pf t amb = - 40 c to +85 c v ih high-level input voltage v cc = 2.0 v 1.5 - - v v cc = 4.5 v 3.15 - - v v cc = 6.0 v 4.2 - - v v il low-level input voltage v cc = 2.0 v - - 0.5 v v cc = 4.5 v - - 1.35 v v cc = 6.0 v - - 1.8 v v oh high-level output voltage v i =v ih or v il i o = - 20 m a; v cc = 2.0 v 1.9 - - v i o = - 20 m a; v cc = 4.5 v 4.4 - - v i o = - 20 m a; v cc = 6.0 v 5.9 - - v i o = - 4 ma; v cc = 4.5 v 3.84 - - v i o = - 5.2 ma; v cc = 6.0 v 5.34 - - v
9397 750 13816 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 8 of 20 philips semiconductors 74hc75 quad bistable transparant latch v ol low-level output voltage v i =v ih or v il i o =20 m a; v cc = 2.0 v - - 0.1 v i o =20 m a; v cc = 4.5 v - - 0.1 v i o =20 m a; v cc = 6.0 v - - 0.1 v i o = 4 ma; v cc = 4.5 v - - 0.33 v i o = 5.2 ma; v cc = 6.0 v - - 0.33 v i li input leakage current v i =v cc or gnd; v cc = 6.0 v - - 1.0 m a i cc quiescent supply current v i =v cc or gnd; i o =0a; v cc = 6.0 v --80 m a t amb = - 40 c to +125 c v ih high-level input voltage v cc = 2.0 v 1.5 - - v v cc = 4.5 v 3.15 - - v v cc = 6.0 v 4.2 - - v v il low-level input voltage v cc = 2.0 v - - 0.5 v v cc = 4.5 v - - 1.35 v v cc = 6.0 v - - 1.8 v v oh high-level output voltage v i =v ih or v il - i o = - 20 m a; v cc = 2.0 v 1.9 - - v i o = - 20 m a; v cc = 4.5 v 4.4 - - v i o = - 20 m a; v cc = 6.0 v 5.9 - - v i o = - 4 ma; v cc = 4.5 v 3.7 - - v i o = - 5.2 ma; v cc = 6.0 v 5.2 - - v v ol low-level output voltage v i =v ih or v il - i o =20 m a; v cc = 2.0 v - - 0.1 v i o =20 m a; v cc = 4.5 v - - 0.1 v i o =20 m a; v cc = 6.0 v - - 0.1 v i o = 4 ma; v cc = 4.5 v - - 0.4 v i o = 5.2 ma; v cc = 6.0 v - - 0.4 v i li input leakage current v i =v cc or gnd; v cc = 6.0 v - - 1.0 m a i cc quiescent supply current v i =v cc or gnd; i o =0a; v cc = 6.0 v - - 160 m a table 7: static characteristics continued at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit
9397 750 13816 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 9 of 20 philips semiconductors 74hc75 quad bistable transparant latch 11. dynamic characteristics table 8: dynamic characteristics gnd = 0 v; t r =t f = 6 ns; c l = 50 pf; unless otherwise speci?ed, see figure 10 . symbol parameter conditions min typ max unit t amb = 25 c t phl , t plh propagation delay nd to nq see figure 6 v cc = 2.0 v - 33 110 ns v cc = 4.5 v - 12 22 ns v cc = 6.0 v - 10 19 ns v cc = 5.0 v; c l =15pf - 11 - ns propagation delay nd to n q see figure 7 v cc = 2.0 v - 39 120 ns v cc = 4.5 v - 14 24 ns v cc = 6.0 v - 11 20 ns v cc = 5.0 v; c l =15pf - 11 - ns propagation delay lenn to nq see figure 9 v cc = 2.0 v - 33 120 ns v cc = 4.5 v - 12 24 ns v cc = 6.0 v - 10 20 ns v cc = 5.0 v; c l =15pf - 11 - ns propagation delay lenn to n q see figure 9 v cc = 2.0 v - 39 125 ns v cc = 4.5 v - 14 25 ns v cc = 6.0 v - 11 21 ns v cc = 5.0 v; c l =15pf - 11 - ns t thl , t tlh output transition time see figure 6 and 7 v cc = 2.0 v - 19 75 ns v cc = 4.5 v - 7 15 ns v cc = 6.0 v - 6 13 ns t w enable pulse width high see figure 9 v cc = 2.0 v 80 17 - ns v cc = 4.5 v 16 6 - ns v cc = 6.0 v 14 5 - ns t su set-up time nd to lenn see figure 8 v cc = 2.0 v 60 14 - ns v cc = 4.5 v 12 5 - ns v cc = 6.0 v 10 4 - ns t h hold time nd to lenn see figure 8 v cc = 2.0 v 3 - 8- ns v cc = 4.5 v 3 - 3- ns v cc = 6.0 v 3 - 2- ns
9397 750 13816 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 10 of 20 philips semiconductors 74hc75 quad bistable transparant latch c pd power dissipation capacitance per latch v i = gnd to v cc [1] -42-pf t amb = - 40 c to +85 c t phl , t plh propagation delay nd to nq see figure 6 v cc = 2.0 v - - 140 ns v cc = 4.5 v - - 28 ns v cc = 6.0 v - - 24 ns propagation delay nd to n q see figure 7 v cc = 2.0 v - - 150 ns v cc = 4.5 v - - 30 ns v cc = 6.0 v - - 26 ns propagation delay lenn to nq see figure 9 v cc = 2.0 v - - 150 ns v cc = 4.5 v - - 30 ns v cc = 6.0 v - - 26 ns propagation delay lenn to n q see figure 9 v cc = 2.0 v - - 155 ns v cc = 4.5 v - - 31 ns v cc = 6.0 v - - 26 ns t thl , t tlh output transition time see figure 6 and 7 v cc = 2.0 v - - 95 ns v cc = 4.5 v - - 19 ns v cc = 6.0 v - - 16 ns t w enable pulse width high see figure 9 v cc = 2.0 v 100 - - ns v cc = 4.5 v 20 - - ns v cc = 6.0 v 17 - - ns t su set-up time nd to lenn see figure 8 v cc = 2.0 v 75 - - ns v cc = 4.5 v 15 - - ns v cc = 6.0 v 13 - - ns t h hold time nd to lenn see figure 8 v cc = 2.0 v 3 - - ns v cc = 4.5 v 3 - - ns v cc = 6.0 v 3 - - ns table 8: dynamic characteristics continued gnd = 0 v; t r =t f = 6 ns; c l = 50 pf; unless otherwise speci?ed, see figure 10 . symbol parameter conditions min typ max unit
9397 750 13816 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 11 of 20 philips semiconductors 74hc75 quad bistable transparant latch [1] c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ ? (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; ? (c l v cc 2 f o ) = sum of outputs. t amb = - 40 c to +125 c t phl , t plh propagation delay nd to nq see figure 6 v cc = 2.0 v - - 165 ns v cc = 4.5 v - - 33 ns v cc = 6.0 v - - 28 ns propagation delay nd to n q see figure 7 v cc = 2.0 v - - 180 ns v cc = 4.5 v - - 36 ns v cc = 6.0 v - - 31 ns propagation delay lenn to nq see figure 9 v cc = 2.0 v - - 180 ns v cc = 4.5 v - - 36 ns v cc = 6.0 v - - 31 ns propagation delay lenn to n q see figure 9 v cc = 2.0 v - - 190 ns v cc = 4.5 v - - 38 ns v cc = 6.0 v - - 32 ns t thl , t tlh output transition time see figure 6 and 7 v cc = 2.0 v - - 110 ns v cc = 4.5 v - - 22 ns v cc = 6.0 v - - 19 ns t w enable pulse width high see figure 9 v cc = 2.0 v 120 - - ns v cc = 4.5 v 24 - - ns v cc = 6.0 v 20 - - ns t su set-up time nd to lenn see figure 8 v cc = 2.0 v 90 - - ns v cc = 4.5 v 18 - - ns v cc = 6.0 v 15 - - ns t h hold time nd to lenn see figure 8 v cc = 2.0 v 3 - - ns v cc = 4.5 v 3 - - ns v cc = 6.0 v 3 - - ns table 8: dynamic characteristics continued gnd = 0 v; t r =t f = 6 ns; c l = 50 pf; unless otherwise speci?ed, see figure 10 . symbol parameter conditions min typ max unit
9397 750 13816 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 12 of 20 philips semiconductors 74hc75 quad bistable transparant latch 12. waveforms v m = 0.5 v i . fig 6. waveforms showing the data input (nd) to output (nq) propagation delays and the output transition times v m = 0.5 v i . fig 7. waveforms showing the data input (nd) to output (n q) propagation delays and the output transition times the shaded areas indicate when the input is permitted to change for predictable output performance. v m = 0.5 v i . fig 8. waveforms showing the data set-up and hold times for nd input to lenn input 001aab855 nd input nq output v m t phl t thl t tlh t plh v m 001aab856 nd input nq output v m t phl t thl t tlh t plh v m t su t h nq output lenn input v m v m 001aab858 t su t h nd input q = d q = d
9397 750 13816 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 13 of 20 philips semiconductors 74hc75 quad bistable transparant latch v m = 0.5 v i . fig 9. waveforms showing the latch enable input (lenn) pulse width, the latch enable input to outputs (nq, n q) propagation delays and the output transition times test data is given in t ab le 9 . de?nitions for test circuit: r t = termination resistance should be equal to output impedance z o of the pulse generator. c l = load capacitance including jig and probe capacitance. fig 10. load circuitry for switching times table 9: test data supply input load v cc v i t r , t f c l 2.0 v v cc 6 ns 50 pf 4.5 v v cc 6 ns 50 pf 6.0 v v cc 6 ns 50 pf 5.0 v v cc 6 ns 15 pf nd input lenn input nq output nq output t w v m v m v m 001aab857 t phl t plh t thl t tlh t thl t plh t phl t tlh mna101 v cc v i v o r t c l pulse generator d.u.t.
9397 750 13816 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 14 of 20 philips semiconductors 74hc75 quad bistable transparant latch 13. package outline fig 11. package outline sot38-4 (dip16) references outline version european projection issue date iec jedec jeita sot38-4 95-01-14 03-02-13 m h c (e ) 1 m e a l seating plane a 1 w m b 1 b 2 e d a 2 z 16 1 9 8 e pin 1 index b 0 5 10 mm scale note 1. plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. unit a max. 12 b 1 (1) (1) (1) b 2 cd e e m z h l mm dimensions (inch dimensions are derived from the original mm dimensions) a min. a max. b max. w m e e 1 1.73 1.30 0.53 0.38 0.36 0.23 19.50 18.55 6.48 6.20 3.60 3.05 0.254 2.54 7.62 8.25 7.80 10.0 8.3 0.76 4.2 0.51 3.2 inches 0.068 0.051 0.021 0.015 0.014 0.009 1.25 0.85 0.049 0.033 0.77 0.73 0.26 0.24 0.14 0.12 0.01 0.1 0.3 0.32 0.31 0.39 0.33 0.03 0.17 0.02 0.13 dip16: plastic dual in-line package; 16 leads (300 mil) sot38-4
9397 750 13816 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 15 of 20 philips semiconductors 74hc75 quad bistable transparant latch fig 12. package outline sot109-1 (so16) x w m q a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 8 9 1 16 y pin 1 index unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 sot109-1 99-12-27 03-02-19 076e07 ms-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.39 0.38 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.020 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 0 2.5 5 mm scale so16: plastic small outline package; 16 leads; body width 3.9 mm sot109-1
9397 750 13816 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 16 of 20 philips semiconductors 74hc75 quad bistable transparant latch fig 13. package outline sot338-1 (ssop16) unit a 1 a 2 a 3 b p cd (1) e (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 1.25 7.9 7.6 1.03 0.63 0.9 0.7 1.00 0.55 8 0 o o 0.13 0.2 0.1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. sot338-1 99-12-27 03-02-19 (1) w m b p d h e e z e c v m a x a y 1 8 16 9 q a a 1 a 2 l p q detail x l (a ) 3 mo-150 pin 1 index 0 2.5 5 mm scale ssop16: plastic shrink small outline package; 16 leads; body width 5.3 mm sot338-1 a max. 2
9397 750 13816 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 17 of 20 philips semiconductors 74hc75 quad bistable transparant latch fig 14. package outline sot403-1 (tssop16) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.40 0.06 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot403-1 mo-153 99-12-27 03-02-18 w m b p d z e 0.25 18 16 9 q a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 a max. 1.1 pin 1 index
9397 750 13816 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 18 of 20 philips semiconductors 74hc75 quad bistable transparant latch 14. revision history table 10: revision history document id release date data sheet status change notice doc. number supersedes 74hc75_3 20041112 product data sheet - 9397 750 13816 74hc_hct75_cnv_2 modi?cations: ? the format of this data sheet has been redesigned to comply with the current presentation and information standard of philips semiconductors. ? removed type number 74hct75. ? inserted family speci?cation. 74hc_hct75_cnv_2 19970918 product speci?cation - - 74hc_hct75_1 74hc_hct75_1 19901201 product speci?cation - - -
philips semiconductors 74hc75 quad bistable transparant latch 9397 750 13816 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 19 of 20 15. data sheet status [1] please consult the most recently issued data sheet before initiating or completing a design. [2] the product status of the device(s) described in this data sheet may have changed since this data sheet was published. the l atest information is available on the internet at url http://www.semiconductors.philips.com. [3] for data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 16. de?nitions short-form speci?cation the data in a short-form speci?cation is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values de?nition limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. 17. disclaimers life support these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes philips semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. when the product is in full production (status production), relevant changes will be communicated via a customer product/process change noti?cation (cpcn). philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise speci?ed. 18. contact information for additional information, please visit: http://www.semiconductors.philips.com for sales of?ce addresses, send an email to: sales.addresses@www.semiconductors.philips.com level data sheet status [1] product status [2] [3] de?nition i objective data development this data sheet contains data from the objective speci?cation for product development. philips semiconductors reserves the right to change the speci?cation in any manner without notice. ii preliminary data quali?cation this data sheet contains data from the preliminary speci?cation. supplementary data will be published at a later date. philips semiconductors reserves the right to change the speci?cation without notice, in order to improve the design and supply the best possible product. iii product data production this data sheet contains data from the product speci?cation. philips semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. relevant changes will be communicated via a customer product/process change noti?cation (cpcn).
? koninklijke philips electronics n.v. 2004 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. date of release: 12 november 2004 document number: 9397 750 13816 published in the netherlands philips semiconductors 74hc75 quad bistable transparant latch 19. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 quick reference data . . . . . . . . . . . . . . . . . . . . . 2 4 ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 7 functional description . . . . . . . . . . . . . . . . . . . 5 7.1 function table . . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6 9 recommended operating conditions. . . . . . . . 6 10 static characteristics. . . . . . . . . . . . . . . . . . . . . 7 11 dynamic characteristics . . . . . . . . . . . . . . . . . . 9 12 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 13 package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . 18 15 data sheet status . . . . . . . . . . . . . . . . . . . . . . . 19 16 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 17 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 18 contact information . . . . . . . . . . . . . . . . . . . . 19

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